Hi3861LV100

Hi3861LV100

Hi3861LV100 Hisilicon

Key Features

General Specifications
• 1x1 2.4 GHz frequency band (channels 1–14)
• PHY supporting IEEE 802.11b/g/n, MAC supporting IEEE802.11 d/e/h/i/k/v/w
• Built-in PA and LNA, integrated with TX/RX switch and balun
• Station (STA) and access point (AP) modes, up to six STA devices allowed for access as an AP
• WFA WPA, WFA WPA2 personal, and WPS2.0
• 2/3/4-line PTA solution with coexistence of BT and BLE chips
• Input voltage range: 2.3–3.6 V, I/O power voltage: 1.8 V or 3.3 V
• RF auto-calibration solution
• External 32 kHz clock input
• Low power consumption tested at the ambient temperature of 25°C:
Ultra deep sleep mode: 3 μ[email protected] V
Low power consumption tested in a shielded environment at the ambient temperature of 25°C, with the RX duration of 1 ms, and powered by the buck:
DTIM1: 0.97 [email protected] V
DTIM3: 0.36 [email protected] V
DTIM10: 0.15 [email protected] V
PHY Features
• All single-antenna data rates of IEEE802.11b/g/n
• A maximum rate of 72.2 Mbit/s@HT20 MCS7
• Standard 20 MHz bandwidth and 5 MHz/10 MHz narrow bandwidth
• STBC
• Short GI
MAC Features
• A-MPDU and A-MSDU
• Blk-ACK
• QoS
CPU Subsystem
• High-performance 32-bit microprocessor, up to 160 MHz
• Built-in 352 KB SRAM and 288 KB ROM
• Built-in 2 MB flash memory
Peripheral Interfaces
• 1x SDIO interface, 2x SPI interfaces, 2x I2C interfaces, 3x UART interfaces, 15x GPIO interfaces, 7x ADC inputs, 6x PWM interfaces, 1x I2S interface, and external 32 kHz clock (Note: These interfaces are multiplexed.)
• External main crystal frequency of 40 MHz or 24 MHz

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