India’s IISc Proposes Development of Angstrom-Scale Chips Using 2D Materials

In a bold move to leapfrog into next-generation semiconductor technology, a team of 30 scientists from the Indian Institute of Science (IISc) has submitted a proposal to the Indian government to develop Angstrom-scale chips. These ultra-miniature chips, built using two-dimensional (2D) materials, could be nearly ten times smaller than the smallest commercially available chips produced today.

In a bold move to leapfrog into next-generation semiconductor technology, a team of 30 scientists from the Indian Institute of Science (IISc) has submitted a proposal to the Indian government to develop Angstrom-scale chips. These ultra-miniature chips, built using two-dimensional (2D) materials, could be nearly ten times smaller than the smallest commercially available chips produced today.

The proposal outlines a strategy to use cutting-edge materials like graphene and transition metal dichalcogenides (TMDs), which enable chip production beyond the limitations of traditional nanometer-scale semiconductors. This development would mark a significant advancement in India's capabilities, positioning the country as a future leader in semiconductor innovation.

Originally submitted to the Principal Scientific Adviser (PSA) in April 2022, the report was revised and resubmitted in October 2024 before being shared with the Ministry of Electronics and Information Technology (MeitY). The updated report presents a compelling roadmap for research, development, and eventual commercialization of Angstrom-scale chip technology using ultra-thin 2D materials.

Government officials familiar with the matter have indicated that MeitY is showing strong interest in the project. Key decision-makers within MeitY have already conducted preliminary discussions to evaluate potential applications of this technology in advanced electronics.

Currently, India heavily relies on international partnerships for semiconductor fabrication. The country's most significant ongoing chip fabrication initiative is a ₹910 billion project by Tata Electronics in collaboration with Powerchip Semiconductor Manufacturing Corp (PSMC). That project is part of the India Semiconductor Mission and is eligible for up to 50% capital support from the Indian government.

In contrast, the IISc proposal seeks a relatively modest ₹50 billion investment over five years to establish a homegrown ecosystem for next-gen chip technology. The plan includes a roadmap for self-sustainability following the initial funding phase, aiming to ensure long-term innovation independence for India’s semiconductor sector.

This initiative signals a significant step toward technological sovereignty and could unlock new opportunities in AI, quantum computing, and ultra-low-power electronics, domains where Angstrom-scale chips are expected to play a pivotal role in the near future.

Related Articles