NVIDIA Taps TSMC for Rubin Architecture GPUs Using Advanced Chiplet Technology

At the recent GTC 2025 conference, NVIDIA CEO Jensen Huang unveiled the company’s forward-looking technology roadmap — one that highlights the next-generation “Rubin” GPU architecture. Now, new reports confirm that NVIDIA is collaborating with TSMC to leverage advanced chiplet-based packaging for Rubin GPUs, marking a significant evolution beyond the Blackwell architecture.

Embracing Chiplet Technology: A Paradigm Shift in GPU Design

Unlike traditional monolithic GPU designs, chiplets (also known as multi-die packaging) break down large chips into smaller, modular components. These chiplets are then interconnected within a single package, offering a number of advantages:

Higher manufacturing yield

Improved scalability

Lower production costs

Enhanced energy efficiency

This shift is a response to the growing complexity of chip design and the physical limitations of traditional process scaling. By utilizing TSMC’s cutting-edge packaging capabilities, NVIDIA aims to optimize performance and power efficiency — critical for AI, data centers, and high-performance computing (HPC) applications.

Rubin GPUs Built on TSMC’s Optimized 3nm N3P Node

The Rubin architecture will be fabricated using TSMC’s N3P process, a refined version of the foundry's 3nm family that improves:

Performance-per-watt

Transistor density

Power efficiency

This enables NVIDIA to push GPU performance boundaries while maintaining superior energy efficiency — a core requirement for next-gen AI workloads.

Advanced Packaging: SoIC and HBM4 Integration

NVIDIA’s Rubin GPUs will also benefit from TSMC’s advanced 3D packaging technology, SoIC (System on Integrated Chips). This enables vertical stacking of logic and memory dies, which:

Reduces interconnect latency between chiplets

Improves power delivery

Maximizes bandwidth

TSMC is planning to expand SoIC production capacity by the end of 2025, underlining the increasing demand for advanced packaging in AI hardware.

The Rubin-based Vera Rubin NVL144 platform will feature:

Two chiplets (standard-sized Rubin GPUs)

Up to 50 PFLOPS of FP4 performance

288GB of HBM4 memory

The higher-end Rubin Ultra NVL576 platform will scale up with:

Four chiplets

Up to 100 PFLOPS of FP4 performance

1TB of HBM4e (stacked across 16 HBM dies)

Chiplet-Based GPUs: The Future of AI Hardware

NVIDIA’s move toward chiplet designs mirrors similar strategies from AMD and Intel, who are also integrating chiplet architecture into their latest CPUs and GPUs. Chiplet modularity allows chipmakers to combine heterogeneous compute units, optimizing hardware for specific workloads such as:

Generative AI

Scientific simulations

Massive-scale inference and training

As AI and HPC workloads surge, modular, scalable GPU architectures — supported by leading-edge fabrication and packaging — will become the industry standard.

Conclusion

With the Rubin architecture, NVIDIA is embracing the future of semiconductor design — one that’s modular, energy-efficient, and tailor-made for AI at scale. Backed by TSMC’s N3P process and SoIC packaging, Rubin GPUs are set to redefine performance standards for the next generation of AI and HPC infrastructure.