Hi3921EV100

Key Features

Communication metrics
- Physical layer peak rate 0.507Mbit/s
- Receive sensitivity better than 0.2mVpp
Power Consumption
- Chip static power consumption ≤50mW
Physical layer characteristics
- Realize the subset of IEEE 1901.1 standard, and interconnect the chips that also use this subset.
- Supports three frequency bands: 1.6M~6M, below 500K, below 150K, and subcarriers can be configured.
- Adopts OFDM technology and supports BPSK and QPSK modulation modes.
- Supports FEC and CRC functions, strong denoising and error correction capability.
MAC features
- Supports TDMA and CSMA/CA, providing conflict avoidance mechanism.
- Supports data segmentation and reorganization to improve transmission efficiency.
- Supports data retransmission mechanism
- Supports 4 levels of QoS to meet different service quality requirements.
Networking Features
- Supports automatic fast networking, typical 500 scale, 2-layer network scenario, 10s to complete fast networking, support fast communication.
- Supports dynamic routing and multi-path addressing.
CPU
- High-performance Cortex-M3 processor with 200MHz operating frequency.
- Embedded SRAM 256KB
Peripheral Interface
- 1 SPI interface, 1 I2C interface, 2 UART interfaces, FLASH interface, 2 PGAs, 6 GPIO interfaces, 1 AD input (12-bit, 4-channel), 1 PWM